Integrated circuits and corresponding electrical and electronic devices implemented in the form of integrated circuits are widely used in today's technology. Manufacturing integrated circuits typically requires several ten to several hundred individual process steps such as depositing semiconducting, conducting or insulating layers, doping regions of a semiconductor, and etching, to name but a few.
Many of these and similar process steps are supposed to influence an underlying substrate only locally. For instance, when etching a trench or when doping a region of a semiconducting substrate to form, for instance, an n-doped area, the physical or chemical effects of the corresponding process step are often intended to be limited to individual locations and positions on the substrate. As a consequence, aligning the substrate with respect to its position, orientation, tilt and further parameters from process step to process step is in many cases advisable.
The situation may even become more complex when some process steps, such as a tempering step, an activation step or other chemical or physical treatment steps, need to be applied prior to or after other steps, limiting the possibilities of designing the corresponding process flow. Moreover, further parameters such as the performance of the device, costs, properties of individual structures (e.g., electrical properties), stress-related properties, chemical and physical properties may impose further boundary conditions concerning the design of the process flow. These considerations may also limit the freedom concerning alignment requirements between different process steps.
Deficiencies concerning the alignment of the substrate may also require implementing larger structures, which in turn may limit the possibilities of improving an integration density of more complex devices on the same surface of the substrate. Hence, a need exists for improved alignment in many fields of device and integrated circuit fabrication.